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UBA2014
600 V driver IC for HF fluorescent lamps
Rev. 04 -- 16 October 2008 Product data sheet
1. General description
The IC is a monolithic integrated circuit for driving electronically ballasted fluorescent lamps, with mains voltages up to 277 V (RMS) (nominal value). The circuit is made in a 650 V Bipolar CMOS DMOS (BCD) power-logic process. It provides the drive function for the two discrete power MOSFETs. Besides the drive function, the IC also includes the level-shift circuit, the oscillator function, a lamp voltage monitor, a current control function, a timer function and protections.
2. Features
I I I I I I I I I Adjustable preheat time Adjustable preheat current Current controlled operating Single ignition attempt Adaptive non-overlap time control Integrated high-voltage level-shift function Power-down function Protection against lamp failures or lamp removal Capacitive mode protection
3. Applications
I The circuit topology enables a broad range of ballast applications at different mains voltages for driving lamp types from T8, T5, PLC, T10, T12, PLL and PLT, for example.
NXP Semiconductors
UBA2014
600 V driver IV for HF fluorescent lamps
4. Quick reference data
Table 1. Quick reference data VDD = 13 V; VFVDD - VSH = 13 V; Tamb = 25 C; all voltages are referenced to GND; see test circuit of Figure 8; unless otherwise specified. Symbol Start-up state VDD(stop) VDD(start) IDD(start) oscillator stop supply voltage oscillator start supply voltage oscillator start-up supply current high-side supply voltage reference voltage maximum bridge frequency minimum bridge frequency output source current output sink current preheat voltage lamp fail voltage maximum lamp voltage offset voltage transconductance preheat time LOW-level output voltage HIGH-level output voltage VCSP = VCSN = 0 V to 2.5 V f = 1 kHz CCT = 330 nF; RIREF = 33 k VGH - VSH = 0 V VGH - VSH = 13 V VDD < VDD(start) 8.6 12.4 9.1 13.0 170 9.6 13.6 200 V V A Parameter Conditions Min Typ Max Unit
High-voltage supply VHS VVREF fmax fmin Io(source) Io(sink) Vph Vlamp(fail) Vlamp(max) Voffset gm Preheat timer tph VOL VOH 1.6 1.8 1.4 3.6 2.0 s V V IHS < 30 A IL = 10 A 2.86 90 38.9 135 265 0.57 0.77 1.44 -2 1900 2.95 100 40.5 180 330 0.60 0.81 1.49 0 3800 570 3.04 110 42.1 235 415 0.63 0.85 1.54 +2 5700 V V kHz kHz mA mA V V V mV A/mV Reference voltage Voltage controlled oscillator
High-side output driver
Preheat current sensor Lamp voltage sensor
Average current sensor
5. Ordering information
Table 2. Ordering information Package Name UBA2014T UBA2014P SO16 DIP16 Description plastic small outline package; 16 leads; body width 3.9 mm plastic dual in-line package; 16 leads (300 mil); long body Version SOT109-1 SOT38-1 Type number
UBA2014_4
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 -- 16 October 2008
2 of 19
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6. Block diagram
VDD 7 3V 9 Vpd SUPPLY reference voltages supply (5 V) BOOTSTRAP LEVEL SHIFTER HS DRIVER 10 11 LS DRIVER 6 GH SH GL FVDD VREF
COUNTER
LOGIC
Product data sheet Rev. 04 -- 16 October 2008 3 of 19
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NXP Semiconductors
14
digital analog
UBA2014
VDD(L) GND 5 DRIVER LOGIC reset STATE LOGIC ANT/CMD
12
ACM
PREHEAT TIMER
LOGIC
* reset state * start-up state * preheat state * ignition state * burn state * hold state * power-down state
PCS
8
PCS
CT
1
600 V driver IV for HF fluorescent lamps
VOLTAGE CONTROLLED OSCILLATOR
LOGIC LAMP VOLTAGE SENSOR AVERAGE CURRENT SENSOR Vlamp(fail) Vlamp(max) FREQUENCY CONTROL 15 16 CSP CSN
REFERENCE CURRENT
I V
UBA2014
4 IREF
3 CF
13 LVS
2
mgw579
CSW
Fig 1.
Block diagram
NXP Semiconductors
UBA2014
600 V driver IV for HF fluorescent lamps
7. Pinning information
7.1 Pinning
CT CSW CF IREF GND GL VDD PCS
1 2 3 4
16 CSN 15 CSP 14 VREF 13 LVS
CT CSW CF IREF GND GL VDD PCS
1 2 3 4
16 CSN 15 CSP 14 VREF 13 LVS
UBA2014T
5 6 7 8
001aad405
UBA2014P
5 6 7 8
001aad486
12 ACM 11 SH 10 GH 9 FVDD
12 ACM 11 SH 10 GH 9 FVDD
Fig 2.
Pin configuration (SO16)
Fig 3.
Pin configuration (DIP16)
7.2 Pin description
Table 3. Symbol CT CSW CF IREF GND GL VDD PCS FVDD GH SH ACM LVS VREF CSP CSN Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description preheat timer output input of voltage controlled oscillator voltage controlled oscillator output internal reference current input ground gate output for the low-side switch low-voltage supply preheat current sensor input floating supply voltage; supply for high-side switch gate output for the high-side switch source for the high-side switch capacitive mode input lamp voltage sensor input reference voltage output positive input for the average current sensor negative input for the average current sensor
UBA2014_4
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Product data sheet
Rev. 04 -- 16 October 2008
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NXP Semiconductors
UBA2014
600 V driver IV for HF fluorescent lamps
8. Functional description
8.1 Start-up state
Initial start-up can be achieved by charging the low-voltage supply capacitor C7 (see Figure 8) via an external start-up resistor. Start-up of the circuit is achieved under the condition that both half bridge transistors TR1 and TR2 are non-conductive. The circuit will be reset in the start-up state. If the low-voltage supply (VDD) reaches the value of VDD(start) the circuit will start oscillating. A DC reset circuit is incorporated in the High-Side (HS) driver. Below the lockout voltage at the FVDD pin the output voltage (VGH - VSH) is zero. The voltages at pins CF and CT are zero during the start-up state.
8.2 Oscillation
The internal oscillator is a Voltage Controlled Oscillator (VCO) circuit which generates a sawtooth waveform between the VCF(high) level and 0 V. The frequency of the sawtooth is determined by capacitor CCF, resistor RIREF, and the voltage at pin CSW. The minimum and maximum switching frequencies are determined by RIREF and CCF; their ratio is internally fixed. The sawtooth frequency is twice the half bridge frequency. The UBA2014 brings the transistors TR1 and TR2 into conduction alternately with a duty cycle of approximately 50 %. An overview of the oscillator signal and driver signals is illustrated in Figure 4. The oscillator starts oscillating at fmax. During the first switching cycle the Low-Side (LS) transistor is switched on. The first conducting time is made extra long to enable the bootstrap capacitor to charge.
8.3 Adaptive non-overlap
The non-overlap time is realized with an Adaptive Non-overlap circuiT (ANT). By using an adaptive non-overlap circuit, the application can determine the duration of the non-overlap time and make it optimum for each frequency; see Figure 4. The non-overlap time is determined by the slope of the half bridge voltage, and is detected by the signal across resistor R16 which is connected directly to pin ACM. The minimum non-overlap time is internally fixed. The maximum non-overlap time is internally fixed at approximately 25 % of the bridge period time. An internal filter of 30 ns is included at the ACM pin to increase the noise immunity.
8.4 Timing circuit
A timing circuit is included to determine the preheat time and the ignition time. The circuit consists of a clock generator and a counter. The preheat time is defined by CCT and RIREF and consists of 7 pulses at CCT; the maximum ignition time is 1 pulse at CCT. The timing circuit starts operating after the start-up state, as soon as the low supply voltage (VDD) has reached VDD(start) or when a critical value of the lamp voltage (Vlamp(fail)) is exceeded. When the timer is not operating CCT is discharged to 0 V at 1 mA.
UBA2014_4
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 -- 16 October 2008
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NXP Semiconductors
UBA2014
600 V driver IV for HF fluorescent lamps
8.5 Preheat state
After starting at fmax, the frequency decreases until the momentary value of the voltage across sense resistor R14 reaches the internally fixed preheat voltage level (pin PCS). At crossing the preheat voltage level, the output current of the Preheat Current Sensor (PCS) circuit discharges the capacitor CCSW, thus raising the frequency. The preheat time begins at the moment that the circuit starts oscillating. During the preheat time the Average Current Sensor (ACS) circuit is disabled. An internal filter of 30 ns is included at pin PCS to increase the noise immunity.
8.6 Ignition state
After the preheat time the ignition state is entered and the frequency will sweep down due to charging of the capacitor at pin CSW with an internally fixed current; see Figure 5. During this continuous decrease in frequency, the circuit approaches the resonant frequency of the load. This will cause a high voltage across the load, which normally ignites the lamp. The ignition voltage of a lamp is designed above the Vlamp(fail) level. If the lamp voltage exceeds the Vlamp(fail) level the ignition timer is started.
8.7 Burn state
If the lamp voltage does not exceed the Vlamp(max) level the voltage at pin CSW will continue to increase until the clamp level at pin CSW is reached; see Figure 5. As a consequence the frequency will decrease until the minimum frequency is reached. When the frequency reaches its minimum level it is assumed that the lamp has ignited and the circuit will enter the burn state. The ACS circuit will be enabled. As soon as the averaged voltage across sense resistor R14, measured at pin CSN, reaches the reference level at pin CSP, the average current sensor circuit will take over the control of the lamp current. The average current through R14 is transferred to a voltage at the voltage controlled oscillator and regulates the frequency and, as a result, the lamp current.
8.8 Lamp failure mode
8.8.1 During ignition state
If the lamp does not ignite, the voltage level increases. When the lamp voltage exceeds the Vlamp(max) level, the voltage will be regulated at the Vlamp(max) level; see Figure 6. When the Vlamp(fail) level is crossed the ignition timer has already started. If the voltage at pin LVS is above the Vlamp(fail) level at the end of the ignition time the circuit stops oscillating and is forced into the Power-down mode. The circuit will be reset only when the supply voltage is powered down.
8.8.2 During burn state
If the lamp fails during normal operation, the voltage across the lamp will increase and the lamp voltage will exceed the Vlamp(fail) level; see Figure 7. At that moment the ignition timer is started. If the lamp voltage increases further it will reach the Vlamp(max) level. This forces the circuit to reenter the ignition state and results in an attempt to re-ignite the lamp. If during restart the lamp still fails, the voltage remains high until the end of the ignition time. At the end of the ignition time the circuit stops oscillating and the circuit will enter the Power-down mode.
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(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 -- 16 October 2008
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NXP Semiconductors
UBA2014
600 V driver IV for HF fluorescent lamps
8.9 Power-down mode
The Power-down mode will be entered if, at the end of the ignition time, the voltage at pin LVS is above Vlamp(fail). In the Power-down mode the oscillator will be stopped and both TR1 and TR2 will be non-conductive. The VDD supply is internally clamped. The circuit is released from the Power-down mode by lowering the low-voltage supply below VDD(reset).
8.10 Capacitive mode protection
The signal across R16 also gives information about the switching behavior of the half bridge. If, after the preheat state, the voltage across the ACM resistor (R16) does not exceed the VCMD level during the non-overlap time, the Capacitive Mode Detection (CMD) circuit assumes that the circuit is in the capacitive mode of operation. As a consequence the frequency will directly be increased to fmax. The frequency behavior is decoupled from the voltage at pin CSW until CCSW has been discharged to zero.
8.11 Charge coupling
Due to parasitic capacitive coupling to the high voltage circuitry all pins are burdened with a repetitive charge injection. Given the typical application the pins IREF and CF are sensitive to this charge injection. For charge coupling of approximately 8 pC, a safe functional operation of the IC is guaranteed, independent of the current level. Charge coupling at current levels below 50 A will not interfere with the accuracy of the VCS, VPCS and VACM levels. Charge coupling at current levels below 20 A will not interfere with the accuracy of any parameter.
8.12 Design equations
The following design equations are used to calculate the desired preheat time, the maximum ignition time, and the minimum and the maximum switching frequency. C CT R IREF t ph = 1.8 x ------------------------- x -------------------9 3 330 x 10 33 x 10 C CT R IREF t ign = 0.26 x ------------------------- x -------------------9 3 330 x 10 33 x 10 33 x 10 3 100 x 10 f min = 40.5 x 10 x --------------------------- x ------------------C CF R IREF f max = 2.5 x f min
- 12 3
(1)
(2)
(3) (4)
Start of ignition is defined as the moment at which the measured lamp voltage crosses the Vlamp(fail) level; see Section 8.8.
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(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 -- 16 October 2008
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NXP Semiconductors
UBA2014
600 V driver IV for HF fluorescent lamps
mgw582
VCF 0
V(GH-SH) 0
VGL 0
Vhalfbridge 0 VACM 0
time
Fig 4.
Oscillator and driver signals
Vlamp Vlamp(max) Vlamp(fail)
preheat state
ignition state
burn state
f min detection
Timer on off time
mgw583
Fig 5.
Normal ignition behavior
UBA2014_4
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Product data sheet
Rev. 04 -- 16 October 2008
8 of 19
NXP Semiconductors
UBA2014
600 V driver IV for HF fluorescent lamps
Vlamp Vlamp(max) Vlamp(fail)
preheat state
ignition state
power-down state
Timer on off time
timer ended
mgw584
Fig 6.
Failure mode during ignition
Vlamp Vlamp(max) Vlamp(fail)
burn state
ignition state
power-down state
Timer on off
timer started
timer ended time
mgw585
Fig 7.
Failure mode during burn
UBA2014_4
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 -- 16 October 2008
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NXP Semiconductors
UBA2014
600 V driver IV for HF fluorescent lamps
9. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages referenced to GND. Symbol VHS VVDD VACM VPCS VLVS VCSP VCSN VCSW Tamb Tj Tstg Vesd Parameter high-side supply voltage voltage at pin VDD voltage at pin ACM voltage at pin PCS voltage at pin LVS voltage at pin CSP voltage at pin CSN voltage at pin CSW ambient temperature junction temperature storage temperature electrostatic discharge voltage pins FVDD, GH and SH pins CT, CSW, CF, IREF, GL, VDD, PCS, CSN, CSP, VREF, LVS and ACM
[1]
[1] [1]
Conditions IHS < 30 A; t < 1 s IHS < 30 A
Min -5 -5 0 0 -0.3 0 -25 -25 -55 -1000 -2500
Max 600 570 14 +5 +5 5 5 +5 5 +80 +150 +150 +1000 +2500
Unit V V V V V V V V V C C C V V
In accordance with the human body model, i.e. equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor.
10. Thermal characteristics
Table 5. Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient SO16 DIP16 Rth(j-pin) thermal resistance from junction to pin SO16 DIP16 in free air 50 30 K/W K/W Conditions in free air 100 60 K/W K/W Typ Unit
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Product data sheet
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600 V driver IV for HF fluorescent lamps
11. Characteristics
Table 6. Characteristics VDD = 13 V; VFVDD - VSH = 13 V; Tamb = 25 C; all voltages referenced to GND; see test circuit of Figure 8; unless otherwise specified. Symbol VDD VDD(reset) VDD(stop) VDD(start) VDD(hys) VDD(clamp) IDD(start) IDD(pd) IDD Parameter supply voltage reset supply voltage oscillator stop supply voltage oscillator start supply voltage start-stop hysteresis supply voltage clamp supply voltage start-up supply current power-down supply current supply current Power-down mode VDD < VDD(start) VDD = 9 V fbridge = 40 kHz without gate drive 600 V at high-voltage pins IL = 10 A IL = 10 A; Tamb = 25 C to 150 C Conditions TR1 = off; TR2 = off TR1 = off; TR2 = off Min 4.5 8.6 12.4 3.5 10 Typ 5.5 9.1 13.0 3.9 11 170 170 1.5 Max 6 7.0 9.6 13.6 4.4 12 200 200 2.2 Unit V V V V V V A A mA Start-up state: pin VDD
High-voltage supply: pins GH, SH and FVDD IL Vref VVREF Isource Isink Zo VI II latching current reference voltage reference voltage stability source current sink current output impedance input voltage input current IL = 1 mA source 2.86 1 1 65 2.95 -0.64 3.0 2.5 30 3.04 95 A V % mA mA V A Reference voltage: pin VREF
Current supply: pin IREF
Voltage controlled oscillator Output: pin CSW Vo Vclamp fmax fmin fstab tstart tno(min) tno(max) VCF(high) output control voltage clamp voltage maximum frequency minimum frequency frequency stability first output oscillator stroke time minimum non-overlap time maximum non-overlap time high-level oscillator output voltage GH to GL GL to GH fbridge = 40 kHz f = fmin
[1]
2.7 burn state 2.8 90 38.9 Tamb = -20 C to +80 C 0.68 0.75 -
3.0 3.1 100 40.5 1.3 50 0.90 1.00 7.5 2.5
3.3 3.4 110 42.1 1.13 1.25 -
V V kHz kHz % s s s s V
Voltage controlled oscillator output: pin CF
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Product data sheet
Rev. 04 -- 16 October 2008
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UBA2014
600 V driver IV for HF fluorescent lamps
Table 6. Characteristics ...continued VDD = 13 V; VFVDD - VSH = 13 V; Tamb = 25 C; all voltages referenced to GND; see test circuit of Figure 8; unless otherwise specified. Symbol Io(start) Io(min) Io(max) Parameter oscillator output start current maximum oscillator output current Conditions VCF = 1.5 V VCF = 1.5 V Min 3.8 Typ 4.5 21 54 Max 5.2 Unit A A A
minimum oscillator output current VCF = 1.5 V
Output drivers High-side driver output: pin GH VOH VOL Io(source) Io(sink) Ron Roff VOH VOL Io(source) Io(sink) Ron Roff VFVDD IFVDD HIGH-level output voltage LOW-level output voltage output source current output sink current on resistance off resistance HIGH-level output voltage LOW-level output voltage output source current output sink current on resistance off resistance lockout voltage floating well supply current DC level at VGH - VSH = 13 V I = 5 mA Io = 10 mA Io = 10 mA VGH - VSH = 0 V VGH - VSH = 13 V Io = 10 mA Io = 10 mA Io = 10 mA Io = 10 mA VGL = 0 VGL = 13 V Io = 10 mA Io = 10 mA 12.5 135 265 32 16 12.5 135 265 32 16 2.8 180 330 39 21 200 330 39 21 3.5 35 0.5 235 415 45 26 0.5 235 415 45 26 4.2 V V mA mA V V mA mA V A
Low-side driver output: pin GL
Floating supply voltage: pin FVDD
Bootstrap diode Vboot bootstrap diode forward drop voltage 1.3 1.7 2.1 V
Preheat current sensor Input: pin PCS Ii Vph Io(source) Io(sink) Ii VCMDP VCMDN input current preheat voltage output source current output sink current input current positive capacitive mode detection voltage negative capacitive mode detection voltage VCSW = 2.0 V VCSW = 2.0 V VACM = 0.6 V VPCS = 0.6 V 0.57 9.0 80 -68 0.60 10 10 100 -85 1 0.63 11 1 120 -102 A V A A A mV mV
Output: pin CSW
Adaptive non-overlap and capacitive mode detection; pin ACM
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(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 -- 16 October 2008
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UBA2014
600 V driver IV for HF fluorescent lamps
Table 6. Characteristics ...continued VDD = 13 V; VFVDD - VSH = 13 V; Tamb = 25 C; all voltages referenced to GND; see test circuit of Figure 8; unless otherwise specified. Symbol Input: pin LVS Ii Vlamp(fail) Vlamp(max) Io(sink) Io(source) input current lamp fail voltage maximum lamp voltage output sink current ignition output source current VCSW = 2.0 V VCSW = 2.0 V VLVS = 0.81 V 0.77 119 1.44 27 9.0 0.81 144 1.49 30 10 1 0.85 169 1.54 33 11 A V mV V A A Parameter Conditions Min Typ Max Unit Lamp voltage sensor
Vlamp(fail)(hys) lamp fail hysteresis voltage Output: pin CT
Average current sensor Input: pins CSP and CSN Ii Voffset gm Io tph tign Io VOL VOH Vhys
[1]
input current offset voltage transconductance output current preheat time ignition time output current LOW-level output voltage HIGH-level output voltage hysteresis voltage
VCS = 0 V VCSP = VCSN = 0 V to 2.5 V f = 1 kHz source and sink; VCSW = 2 V CCT = 330 nF; RIREF = 33 k CCT = 330 nF; RIREF = 33 k VCT = 2.5 V
-2 1900 85 1.6 5.5 2.05
0 3800 95 1.8 0.32 5.9 1.4 3.6 2.20
1 +2 5700 105 2.0 6.3 2.35
A mV A/mV A s s A V V V
Output: pin CSW Preheat timer; pin CT
The maximum non-overlap time is determined by the level of the CF signal. If this signal exceeds a level of 1.25 V, the non-overlap will end, resulting in a maximum non-overlap time of 7.5 s at a bridge frequency of 40 kHz.
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(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 -- 16 October 2008
13 of 19
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
12. Application information
F1 1A
REFERENCE CURRENT
VOLTAGE CONTROLLED OSCILLATOR 5 GND 3 CF 2
AVERAGE CURRENT SENSOR 14 VREF
R4 1 M
- +
16 CSN 15 CSP
R8 8.2 k
C19 56 nF
R5 10 k
D4 BYD77D
C17 6.8 nF
C22 8.2 nF
Lamp
Product data sheet Rev. 04 -- 16 October 2008 14 of 19
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NXP Semiconductors
9 FVDD 10 GH BOOTSTRAP VDD 7 HIGH SIDE DRIVER 11 SH
C6 1.2 nF C5 100 nF TR1 IRF820
D1 BYD77D L1 1.9 mH
R10 1 M
R1 1 M
SUPPLY
DRIVER CONTROL
LOW SIDE DRIVER
6 GL
TR2 IRF820
C10 5.6 nF
UBA2014
ADAPTIVE NON-OVERLAP TIMING AND CAPACITIVE MODE DETECTOR PREHEAT CURRENT SENSOR LAMP VOLTAGE SENSOR
Z1 12 V
12 ACM
+
VDC 400 V
R16 1.5
CT 1
PREHEAT TIMER
8 PCS
R13 150
R9 47 R20 220 k C8 330 pF
C24 100 nF
C7 330 nF
DIVIDER
13 LVS
TLD36W
600 V driver IV for HF fluorescent lamps
4 IREF
C23 100 nF C2 12 nF R3 220 k C3 1 nF R2 8.2 k R18 180 k C20 68 nF R14 1
CSW
C15 330 nF
R12 33 k
C14 100 pF
C13 220 nF
UBA2014
mgw586
Fig 8.
Test and application circuit
NXP Semiconductors
UBA2014
600 V driver IV for HF fluorescent lamps
13. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
D
E
A X
c y HE vMA
Z 16 9
Q A2 pin 1 index Lp 1 e bp 8 wM L detail X A1 (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.39 0.014 0.0075 0.38
0.244 0.041 0.228
0.028 0.004 0.012
8 o 0
o
Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Fig 9.
UBA2014_4
Package outline SOT109-1 (SO16)
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 -- 16 October 2008
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NXP Semiconductors
UBA2014
600 V driver IV for HF fluorescent lamps
DIP16: plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 16 9 MH wM (e 1)
pin 1 index E
1
8
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.7 0.19 A1 min. 0.51 0.02 A2 max. 3.7 0.15 b 1.40 1.14 0.055 0.045 b1 0.53 0.38 0.021 0.015 c 0.32 0.23 0.013 0.009 D (1) 21.8 21.4 0.86 0.84 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 L 3.9 3.4 0.15 0.13 ME 8.25 7.80 0.32 0.31 MH 9.5 8.3 0.37 0.33 w 0.254 0.01 Z (1) max. 2.2 0.087
Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT38-1 REFERENCES IEC 050G09 JEDEC MO-001 JEITA SC-503-16 EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-13
Fig 10. Package outline SOT38-1 (DIP16)
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Product data sheet
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600 V driver IV for HF fluorescent lamps
14. Revision history
Table 7. Revision history Release date 20081016 Data sheet status Product data sheet Change notice Supersedes UBA2014_3 Document ID UBA2014_4 Modifications: UBA2014_3 UBA2014_2 UBA2014_1
* *
Max value for VHS in Table 1 updated. Max value for VHS in Table 4 updated. Product data sheet Product data sheet Product specification UBA2014_2 UBA2014_1 -
20080815 20050912 20020516
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600 V driver IV for HF fluorescent lamps
15. Legal information
15.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
15.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
UBA2014_4
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 -- 16 October 2008
18 of 19
NXP Semiconductors
UBA2014
600 V driver IV for HF fluorescent lamps
17. Contents
1 2 3 4 5 6 7 7.1 7.2 8 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.8.1 8.8.2 8.9 8.10 8.11 8.12 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Start-up state . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Oscillation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Adaptive non-overlap . . . . . . . . . . . . . . . . . . . . 5 Timing circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Preheat state . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Ignition state . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Burn state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Lamp failure mode . . . . . . . . . . . . . . . . . . . . . . 6 During ignition state . . . . . . . . . . . . . . . . . . . . . 6 During burn state . . . . . . . . . . . . . . . . . . . . . . . 6 Power-down mode . . . . . . . . . . . . . . . . . . . . . . 7 Capacitive mode protection . . . . . . . . . . . . . . . 7 Charge coupling . . . . . . . . . . . . . . . . . . . . . . . . 7 Design equations . . . . . . . . . . . . . . . . . . . . . . . 7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 10 Thermal characteristics. . . . . . . . . . . . . . . . . . 10 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 11 Application information. . . . . . . . . . . . . . . . . . 14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 16 October 2008 Document identifier: UBA2014_4

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